2015-12-15 03:12:33 +00:00
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Pong
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====
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2015-10-01 14:05:45 +00:00
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2015-12-15 03:12:33 +00:00
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[Version 1.0.0 - 12/14/2015]
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2015-10-01 14:05:45 +00:00
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2015-12-15 03:12:33 +00:00
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The following is a custom version of the classic arcade game Pong in System Verilog and built onto the Artix FPGA.
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This works via a custom ALU intended to process an arbitrary MIPS program with modified memory configuration:
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* .text 0x0000
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* .data 0x2000
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I use a memory mapped IO scheme to draw to the monitor and interact with the keyboard. For demonstration purposes,
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included is a pong program (provided in samples/pong/pong.asm) written in MIPS which will run with the provided ALU
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once programmed onto the FPGA.
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<p align="center">
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<img src="https://raw.githubusercontent.com/jrpotter/pong/master/rsrc/demo.gif">
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</p>
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