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pong/Project.srcs/sim_1/new/Project_screentest_nopause.sv

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Systemverilog

`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 04/15/2015 04:55:09 PM
// Design Name:
// Module Name: Project_screentest_nopause
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//////////////////////////////////////////////////////////////////////////////////
module Project_screentest_nopause(
);
endmodule