mirror of
https://github.com/jrpotter/pong.git
synced 2026-09-03 01:01:28 +00:00
Pong written with custom ALU in Artix FPGA
- SystemVerilog 64.3%
- Tcl 28.6%
- Verilog 7.1%
| Filename | Latest commit message | Latest commit date |
|---|---|---|
| Project.srcs | ||
| rsrc | ||
| samples | ||
| Project.xpr | ||
| README.md | ||
Pong
[Version 1.0.0 - 12/14/2015]
The following is a custom version of the classic arcade game Pong in System Verilog and built onto the Artix FPGA. This works via a custom ALU intended to process an arbitrary MIPS program with modified memory configuration:
- .text 0x0000
- .data 0x2000
I use a memory mapped IO scheme to draw to the monitor and interact with the keyboard. For demonstration purposes, included is a pong program (provided in samples/pong/pong.asm) written in MIPS which will run with the provided ALU once programmed onto the FPGA.
